Struct rstubs::arch::int::ioapic::IoApic

pub struct IoApic {
    pub base: AtomicPtr<u32>,
    overrides: [AtomicU8; 16],
}

The I/O APIC’s Core component is the IO-redirection table. This table is used to configure a flexible mapping between the interrupt number and the external interruption. Entries within this table have a width of 64 bit.

Fields

base: AtomicPtr<u32>

Base address of the IOAPIC registers.

It contains two memory-mapped registers: IOREGSEL at base and IOWIN at base + 0x10.

overrides: [AtomicU8; 16]

Implementations

impl IoApic

pub const DEFAULT_BASE: usize = 4_273_995_776usize

pub const SLOT_MAX: u8 = 24u8

pub const fn new() -> Self

Create a new instance that has to be initialize with Self::init.

pub fn set_override(&self, source: usize, global: u8)

Override a slot id, redirecting it

pub fn init(&self, id: u8, panic_vector: u8)

Initializes the I/O APIC.

This function will initialize the I/O APIC by initializing the IO-redirection table with sane default values. The default interrupt-vector number is chosen such that, in case the interrupt is issued, the panic handler is executed. In the beginning, all external interrupts are disabled within the I/O APIC. Apart from the redirection table, the id (read from the system description tables during boot) needs to be passed in.

pub fn config(&self, device: Device, vector: u8, trigger_level: bool)

Creates a mapping between an interrupt vector and an external interrupt.

fn config_raw(&self, slot: u8, vector: u8, trigger_level: bool)

Configures the redirection slots with:

• lowest priority delivery to all cores
• high polarity
• masked (you can enable the keyboard later)
• tigger level and vector based on the arguments

Note: Do not overwrite any reserved bits of the registers (read-modify-write).

pub fn enable(&self, device: Device, enabled: bool)

Enables or disables interrupts for the given device.

pub fn enabled(&self, device: Device) -> bool

Returns whether interrupts for the device are active.

fn slot(&self, device: Device) -> u8

Get the slot for the device (respecting redirections from the ACPI Tables).

fn write<T: Register>(&self, addr: u32, reg: T)

Write a value to a register.

Access to the actual IOAPIC registers can be obtained by performing the following steps:

1. Write the number of the IOAPIC register to the address stored in IOREGSEL
2. Read the value from / write the value to the address referred to by IOWIN.

fn read<T: Register>(&self, addr: u32) -> T

Read a value from a register.

fn update<T: Register>(&self, addr: u32, f: impl FnOnce(T) -> T)

Read-modify-update the value of a register.