Struct rstubs::arch::int::ioapic::SlotL

#[repr(transparent)]
struct SlotL(u32);

Entry in the redirection table. Lower Half.

Tuple Fields

0: u32

Implementations

impl SlotL

const fn new() -> Self

Creates a new default initialized bitfield.

const fn from_bits(bits: u32) -> Self

Convert from bits.

const fn into_bits(self) -> u32

Convert into bits.

const VECTOR_BITS: usize = 8usize

const VECTOR_OFFSET: usize = 0usize

const fn vector(&self) -> u8

Interrupt vector in the “Interrupt Descriptor Table (IDT)” will be activated when the corresponding external interrupt triggers.

Bits: 0..8

const fn with_vector(self, value: u8) -> Self

Interrupt vector in the “Interrupt Descriptor Table (IDT)” will be activated when the corresponding external interrupt triggers.

Bits: 0..8

fn set_vector(&mut self, value: u8)

Interrupt vector in the “Interrupt Descriptor Table (IDT)” will be activated when the corresponding external interrupt triggers.

Bits: 0..8

const DELIVERY_MODE_BITS: usize = 3usize

const DELIVERY_MODE_OFFSET: usize = 8usize

const fn delivery_mode(&self) -> u8

The delivery mode denotes the way the interrupts will be delivered to the local CPU cores, respectively to their local APICs.

• 0: Fixed (send to all cores from the destination mask)
• 1: Lowest priority (send to the lowest priority core from destination mask)
• 2-7: System management / initialization / external interrupts…

Bits: 8..11

const fn with_delivery_mode(self, value: u8) -> Self

The delivery mode denotes the way the interrupts will be delivered to the local CPU cores, respectively to their local APICs.

• 0: Fixed (send to all cores from the destination mask)
• 1: Lowest priority (send to the lowest priority core from destination mask)
• 2-7: System management / initialization / external interrupts…

Bits: 8..11

fn set_delivery_mode(&mut self, value: u8)

The delivery mode denotes the way the interrupts will be delivered to the local CPU cores, respectively to their local APICs.

• 0: Fixed (send to all cores from the destination mask)
• 1: Lowest priority (send to the lowest priority core from destination mask)
• 2-7: System management / initialization / external interrupts…

Bits: 8..11

const DESTINATION_MODE_BITS: usize = 1usize

const DESTINATION_MODE_OFFSET: usize = 11usize

const fn destination_mode(&self) -> bool

The destination mode defines how the value stored in destination will be interpreted. Local (true) or physical destination.

Bits: 11..12

const fn with_destination_mode(self, value: bool) -> Self

The destination mode defines how the value stored in destination will be interpreted. Local (true) or physical destination.

Bits: 11..12

fn set_destination_mode(&mut self, value: bool)

The destination mode defines how the value stored in destination will be interpreted. Local (true) or physical destination.

Bits: 11..12

const DELIVERY_PENDING_BITS: usize = 1usize

const DELIVERY_PENDING_OFFSET: usize = 12usize

const fn delivery_pending(&self) -> bool

Delivery status holds whether the interrupt delivery is pending (true) or idle.

Bits: 12..13

const fn with_delivery_pending(self, value: bool) -> Self

Delivery status holds whether the interrupt delivery is pending (true) or idle.

Bits: 12..13

fn set_delivery_pending(&mut self, value: bool)

Delivery status holds whether the interrupt delivery is pending (true) or idle.

Bits: 12..13

const POLARITY_BITS: usize = 1usize

const POLARITY_OFFSET: usize = 13usize

const fn polarity(&self) -> bool

The polarity denotes when an interrupt should be issued. This can be low (true) or high.

Bits: 13..14

const fn with_polarity(self, value: bool) -> Self

The polarity denotes when an interrupt should be issued. This can be low (true) or high.

Bits: 13..14

fn set_polarity(&mut self, value: bool)

The polarity denotes when an interrupt should be issued. This can be low (true) or high.

Bits: 13..14

const REMOTE_IRR_BITS: usize = 1usize

const REMOTE_IRR_OFFSET: usize = 14usize

const fn remote_irr(&self) -> bool

The remote IRR bit indicates whether the local APIC(s) accept the level interrupt. The LAPIC EOI sets this read-only flag to zero.

Bits: 14..15

const fn with_remote_irr(self, value: bool) -> Self

The remote IRR bit indicates whether the local APIC(s) accept the level interrupt. The LAPIC EOI sets this read-only flag to zero.

Bits: 14..15

fn set_remote_irr(&mut self, value: bool)

The remote IRR bit indicates whether the local APIC(s) accept the level interrupt. The LAPIC EOI sets this read-only flag to zero.

Bits: 14..15

const TRIGGER_MODE_BITS: usize = 1usize

const TRIGGER_MODE_OFFSET: usize = 15usize

const fn trigger_mode(&self) -> bool

The trigger mode states whether the interrupt signaling is level (true) or edge triggered.

Bits: 15..16

const fn with_trigger_mode(self, value: bool) -> Self

The trigger mode states whether the interrupt signaling is level (true) or edge triggered.

Bits: 15..16

fn set_trigger_mode(&mut self, value: bool)

The trigger mode states whether the interrupt signaling is level (true) or edge triggered.

Bits: 15..16

const MASK_BITS: usize = 1usize

const MASK_OFFSET: usize = 16usize

const fn mask(&self) -> bool

Mask (disables) or unmask interrupts for a particular, external source.

Bits: 16..17

const fn with_mask(self, value: bool) -> Self

Mask (disables) or unmask interrupts for a particular, external source.

Bits: 16..17

fn set_mask(&mut self, value: bool)

Mask (disables) or unmask interrupts for a particular, external source.

Bits: 16..17

Trait Implementations

impl Clone for SlotL

fn clone(&self) -> SlotL

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for SlotL

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for SlotL

fn default() -> Self

Returns the “default value” for a type.

impl From<SlotL> for u32

fn from(v: SlotL) -> u32

Converts to this type from the input type.

impl From<u32> for SlotL

fn from(v: u32) -> Self

Converts to this type from the input type.

impl Copy for SlotL

impl Register for SlotL