Struct rstubs::arch::regs::Cr0

#[repr(transparent)]
pub struct Cr0(u32);

Contains system control flags that control operating mode and states of the processor.

Tuple Fields

0: u32

Implementations

impl Cr0

pub const fn new() -> Self

Creates a new default initialized bitfield.

const PROTECTED_MODE_ENABLE_BITS: usize = 1usize

const PROTECTED_MODE_ENABLE_OFFSET: usize = 0usize

pub const fn with_protected_mode_enable(self, value: bool) -> Self

Enables protected mode.

Bits: 0..1

pub const fn protected_mode_enable(&self) -> bool

Enables protected mode.

Bits: 0..1

pub fn set_protected_mode_enable(&mut self, value: bool)

Enables protected mode.

Bits: 0..1

const MONITOR_COPROCESSOR_BITS: usize = 1usize

const MONITOR_COPROCESSOR_OFFSET: usize = 1usize

pub const fn with_monitor_coprocessor(self, value: bool) -> Self

Enables monitoring of the coprocessor, typical for x87 instructions.

Controls together with the TASK_SWITCHED flag whether a wait or fwait instruction should cause a device-not-available exception.

Bits: 1..2

pub const fn monitor_coprocessor(&self) -> bool

Enables monitoring of the coprocessor, typical for x87 instructions.

Controls together with the TASK_SWITCHED flag whether a wait or fwait instruction should cause a device-not-available exception.

Bits: 1..2

pub fn set_monitor_coprocessor(&mut self, value: bool)

Enables monitoring of the coprocessor, typical for x87 instructions.

Controls together with the TASK_SWITCHED flag whether a wait or fwait instruction should cause a device-not-available exception.

Bits: 1..2

const EMULATE_COPROCESSOR_BITS: usize = 1usize

const EMULATE_COPROCESSOR_OFFSET: usize = 2usize

pub const fn with_emulate_coprocessor(self, value: bool) -> Self

Force all x87 and MMX instructions to cause an exception.

Bits: 2..3

pub const fn emulate_coprocessor(&self) -> bool

Force all x87 and MMX instructions to cause an exception.

Bits: 2..3

pub fn set_emulate_coprocessor(&mut self, value: bool)

Force all x87 and MMX instructions to cause an exception.

Bits: 2..3

const TASK_SWITCHED_BITS: usize = 1usize

const TASK_SWITCHED_OFFSET: usize = 3usize

pub const fn with_task_switched(self, value: bool) -> Self

Automatically set to 1 on hardware task switch.

This flags allows lazily saving x87/MMX/SSE instructions on hardware context switches.

Bits: 3..4

pub const fn task_switched(&self) -> bool

Automatically set to 1 on hardware task switch.

This flags allows lazily saving x87/MMX/SSE instructions on hardware context switches.

Bits: 3..4

pub fn set_task_switched(&mut self, value: bool)

Automatically set to 1 on hardware task switch.

This flags allows lazily saving x87/MMX/SSE instructions on hardware context switches.

Bits: 3..4

const NUMERIC_ERROR_BITS: usize = 1usize

const NUMERIC_ERROR_OFFSET: usize = 5usize

pub const fn with_numeric_error(self, value: bool) -> Self

Enables the native error reporting mechanism for x87 FPU errors.

Bits: 5..6

pub const fn numeric_error(&self) -> bool

Enables the native error reporting mechanism for x87 FPU errors.

Bits: 5..6

pub fn set_numeric_error(&mut self, value: bool)

Enables the native error reporting mechanism for x87 FPU errors.

Bits: 5..6

const WRITE_PROTECT_BITS: usize = 1usize

const WRITE_PROTECT_OFFSET: usize = 16usize

pub const fn with_write_protect(self, value: bool) -> Self

Controls whether supervisor-level writes to read-only pages are inhibited.

Bits: 16..17

pub const fn write_protect(&self) -> bool

Controls whether supervisor-level writes to read-only pages are inhibited.

Bits: 16..17

pub fn set_write_protect(&mut self, value: bool)

Controls whether supervisor-level writes to read-only pages are inhibited.

Bits: 16..17

const ALIGNMENT_MASK_BITS: usize = 1usize

const ALIGNMENT_MASK_OFFSET: usize = 18usize

pub const fn with_alignment_mask(self, value: bool) -> Self

Enables automatic alignment checking.

Bits: 18..19

pub const fn alignment_mask(&self) -> bool

Enables automatic alignment checking.

Bits: 18..19

pub fn set_alignment_mask(&mut self, value: bool)

Enables automatic alignment checking.

Bits: 18..19

const NOT_WRITE_THROUGH_BITS: usize = 1usize

const NOT_WRITE_THROUGH_OFFSET: usize = 29usize

pub const fn with_not_write_through(self, value: bool) -> Self

Ignored. Used to control write-back/write-through cache strategy on older CPUs.

Bits: 29..30

pub const fn not_write_through(&self) -> bool

Ignored. Used to control write-back/write-through cache strategy on older CPUs.

Bits: 29..30

pub fn set_not_write_through(&mut self, value: bool)

Ignored. Used to control write-back/write-through cache strategy on older CPUs.

Bits: 29..30

const CACHE_DISABLE_BITS: usize = 1usize

const CACHE_DISABLE_OFFSET: usize = 30usize

pub const fn with_cache_disable(self, value: bool) -> Self

Disables internal caches (only for some cases).

Bits: 30..31

pub const fn cache_disable(&self) -> bool

Disables internal caches (only for some cases).

Bits: 30..31

pub fn set_cache_disable(&mut self, value: bool)

Disables internal caches (only for some cases).

Bits: 30..31

const PAGING_BITS: usize = 1usize

const PAGING_OFFSET: usize = 31usize

pub const fn with_paging(self, value: bool) -> Self

Enables page translation.

Bits: 31..32

pub const fn paging(&self) -> bool

Enables page translation.

Bits: 31..32

pub fn set_paging(&mut self, value: bool)

Enables page translation.

Bits: 31..32

impl Cr0

pub fn read() -> Self

pub fn update(f: impl FnOnce(Self) -> Self)

unsafe fn write(self)

Trait Implementations

impl Clone for Cr0

fn clone(&self) -> Cr0

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Cr0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Cr0

fn default() -> Self

Returns the “default value” for a type.

impl From<Cr0> for u32

fn from(v: Cr0) -> u32

Converts to this type from the input type.

impl From<u32> for Cr0

fn from(v: u32) -> Self

Converts to this type from the input type.

impl Copy for Cr0