InterSloth: Globales Hardware-gesteuertes Scheduling in einem Multikern-Echtzeitbetriebssystem auf RISC-V

• Typ der Arbeit: Bachelorarbeit
• Status der Arbeit: abgeschlossen
• Projekte: AHA
• Betreuer: Gerion Entrup, Christian Dietrich, Daniel Lohmann
• Bearbeiter: Malte Bargholz
• Ende der Arbeit: 09. Aug 2018
• Ausarbeitung: [PDF]

For real-time systems, the operating system has the goal to orchestrate the execution of jobs such that the overall operation is completed on time. In order to achieve this goal, real-time operating systems should do as little as possible to minimize the influence on the actual computation.

In previous work on the Sloth research project, we examined the possibility to use the interrupt controller, a unit every microcontroller includes, to offload the scheduling work. Every task is assigned to an interrupt source, which has an priority, and the IRQ controller decides, when to execute which thread.

Unluckily, Sloth is only available as partitioned-multicore operating system. The goal of this thesis is to design and implement a variant of Sloth that uses an IRQ controller to do fixed-priority scheduling with thread migration among multiple processors. Since no IRQ controller is fully compatible with this schema, another goal of this thesis is to modify the QEMU system simulator fir the RISC-V architecture to allow the required IRQ dispatching schema.

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location = {Washington, DC, USA},
author = {Rainer M{ü}ller and Daniel Danner and Wolfgang Schr{ö}der-Preikschat and Daniel Lohmann},
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entrysubtype = {Conference},
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@inproceedings{hofer:09:rtss,
ar = {21\% (44/197)},
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