Interaction-Level Specialization of RISC-V Soft Cores for Zephyr RTOS with ARA

• Typ der Arbeit: Masterarbeit
• Status der Arbeit: in Planung
• Projekte: AHA
• Betreuer: Andreas Kässens, Daniel Lohmann

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Context

Within the AHA project, we focus on optimizing embedded systems by specialization of the OS itself. Using the Automatic Real-time Analyzer (ARA)¹, we perform static analysis to enable extensive tailoring of real-time operating systems (RTOS) to the application. The operating system is generated specifically for a single application to provide exactly the required functionality. As a result, we improve non-functional system properties like delay or memory footprint, which can reduce hardware costs and energy consumption. Not only the operating system can be specialized; it is also possible to specialize the underlying hardware as well.

Problem

The idea of pushing parts of the operating system into hardware is not new. There is a lot of related work, where parts of the OS like the scheduler are moved completely into hardware blocks next to the CPU (loose coupling).

A comparably new approach, ChamelIot², is providing an accelerator framework for various OS services to be moved into hardware. By allowing a tightly-coupled approach, parts of the OS semantics can be is moved right into the CPU pipeline of a Rocket RISC-V softcore. But, one question remains: Which OS instances are worth to accelerate? Each application can have different requirements, and using the SIA/SSE static analysis, instances and interactions can be evaluated statically.

Goal

The ChamelIoT configuration shall be derived from the static analysis in ARA. The number of OS primitives in use and which of these shall be accelerated by hardware, can be determined automatically without user interaction. Board: Arty A7-100T/35T

Topics: FPGA, RISC-V, Hardware, ISA, Real-Time Operating System

References

LCTES Conference A
OSEK-V: Application-Specific RTOS Instantiation in Hardware

Christian Dietrich, Daniel LohmannProceedings of the 2017 ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems (LCTES '17)ACM Press2017.
PDF Raw Data 10.1145/3078633.3078637 [BibTex]

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BibTex Entry

@inproceedings{dietrich:17:lctes,
location = {New York, NY, USA},
ar = {25\% (13/56)},
author = {Christian Dietrich and Daniel Lohmann},
booktitle = {Proceedings of the 2017 ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems (LCTES '17)},
category = {os-embedded, SRA},
doi = {10.1145/3078633.3078637},
entrysubtype = {Conference},
month = {June},
publisher = {ACM Press},
title = {{OSEK-V}: Application-Specific {RTOS} Instantiation in Hardware},
venue = {Barcelona, Spain},
year = {2017},
}

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RTAS Conference A
ARA: Static Initialization of Dynamically-Created System Objects

Björn Fiedler, Gerion Entrup, Christian Dietrich, Daniel LohmannProceedings of the 27th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'21)2021.
PDF Details Video Teaser Video 10.1109/RTAS52030.2021.00039 [BibTex]

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BibTex Entry

@inproceedings{fiedler:21:rtas,
author = {Björn Fiedler and Gerion Entrup and Christian Dietrich and Daniel Lohmann},
booktitle = {Proceedings of the 27th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'21)},
doi = {10.1109/RTAS52030.2021.00039},
entrysubtype = {Conference},
month = {May},
pages = {400–412},
title = {{ARA}: Static Initialization of Dynamically-Created System Objects},
venue = {Virtual Event},
year = {2021},
}

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Design und Implementierung eines Zephyr-RTOS-Modells für ARA zur statischen Whole-System-Analyse

Extend ARA - a (real-time) operating system (RTOS) analyzer - for analysis of Zephyr, an RTOS guided by the Linux Foundation

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Typ

Bachelorarbeit

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Status

abgeschlossen

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Supervisors

Gerion Entrup
Daniel Lohmann

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Project

AHA

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Bearbeiter

Kenny Albes (abgegeben: 28. Feb 2021)